RISC CPU片上cache的设计
首发时间:2004-02-02
摘要:本文主要介绍了一款RISC结构CPU的片上Cache(高速缓冲存储器)的设计,从系统级、电路级到版图级详细地介绍了主要的设计方法、cache的结构、内存映射技术及读写控制电路的设计。
关键词: 高速缓冲存储器 全相联 直接映射 组相联 写透 回写
For information in English, please click here
Design of on-chip Cache for RISC CPU
Abstract:In this paper, a design of an on-chip cache memory for a RISC architecture microprocessor was discussed. The method of the design was introduced from system to schematic, to layout. The architecture of the cache and the design of the read/write controller were introduced, too.
Keywords: cache, fully associative, direct mapped, set associative, write through, and write back
基金:
论文图表:
引用
No.1922064107569182****
同行评议
共计0人参与
勘误表
RISC CPU片上cache的设计
评论
全部评论0/1000