MP3音频解码器的硬件设计与FPGA实现
首发时间:2009-01-03
摘要:论文在研究MP3解码算法的基础上采用基于硬件的实现方法完成了mp3解码器的设计。根据硬件实现的特点对算法进行了优化,使用Verilog HDL语言实现了MP3解码器的RTL设计,并完成了功能仿真验证,然后基于Altera的StratixII EP2S180 器件,完成了FPGA硬件原型设计,并在FPGA原型上实现了实时解码的声音播放演示。主观评测效果良好,解码信噪比达到89dB,优于mp3解码一般要求。
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A Case Study on Hardware architecture and FPGA prototype implementation of MP3 audio decoder
Abstract:This paper presents the hardware implementation of MP3 decoder. Based on the optimization of the decoding algorithm, the RTL design in Verilog HDL and verification was accomplished, then FPGA prototype was implemented based on the StratixII EP2S180 device from ALTERA. The real-time decoding and demo of music playing was performed, and the sound effect is desirable. Quantitative analysis shows a SNR of 89dB, which is beyond the ordinary requirement of mp3 decoding.
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No.2719838521712309****
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