基于System Generator数字下变频实现
首发时间:2009-09-15
摘要:Xilinx公司开发的System Generator for DSP是在Matlab/Simulink环境中进行系统建模的一种DSP开发工具。本文通过System Generator for DSP的数字下变频的建模,来表明DSP设计者不需要掌握VHDL(Veriolog)硬件描述性语言以及开发平台细节的情况下,就可以设计出数字下变频部分。本设计通过该方法加速和简化了FPGA的DSP 系统级硬件设计。具有操作简单、设计灵活、效率高等大多优点。
关键词: System Generator FPGA Simulink 数字下变频
For information in English, please click here
The implementation of digital down-conversion
Abstract:The System Generator for DSP developed by Xilinx.Inc. is a DSP development tool under the Matlab / Simulink modeling environment. Through the System Generator for DSP, the paper models digital down-conversion to show that DSP designers can design digital down-conversion while they do not need to master VHDL (Veriolog) hardware description language as well as the development platform details. The method accelerates and simplifies the FPGA-DSP system-level hardware design, which holds the predominance of simple operation、flexible design and high efficiency.
Keywords: System Generator FPGA Simulink digital down-conversion
基金:
论文图表:
引用
No.3519848488912529****
同行评议
共计0人参与
勘误表
基于System Generator数字下变频实现
评论
全部评论0/1000