Shift-Min-Write: a mechanism for reducing write operations in PRAM

• 1、Beijing Higher Institution Engineering Research Center of Intelligent Processing of Visual Mdia and Content Security, Tsinghua University
• 2、 Department of Computer Science &Technology, Tsinghua University

Abstract：The memory subsystem accounts for a significant (about 40%) cost and power budget of a computer system. Current dram-based main memory systems are starting to reach the power cost limit. An alternative memory technology that uses resistance contrast in phase-change material is being actively investigated in the circuits community. Phase-change random access memory (PRAM) devices offer more density capacity of future systems while remaining within the cost and power constraints. However, the relatively low write bandwidth and the less-than-desirable write endurance of PRAM remain for improvement. Shift-Min-Write is proposed and evaluated, a simple microarchitectural technique to replace a PRAM write operation. Experiments show that the proposed mechanism enlarges write bandwidth and endurance more than 1X and also reduce more than 60% of write traffic, even when word width increases.

Keywords： phase-change random access memory；write operation；memory performance