基于多核SOPC的信息加密器的设计与实现
首发时间:2011-12-27
摘要:本文介绍了基于"多核SOPC"硬件平台和AES算法的信息加密器的设计与实现。文中首先给出了多核SOPC的设计理念,指出它是微处理器的发展趋势;接着研究了AES加密算法的具体实现;再以GX-CIDE实验箱为平台,在Altera FPGA中搭建了基于Mutex和Mailbox的包含3个NiosII的多核硬件环境;最后介绍了信息加密器多核任务的划分和具体的软件实现,并进行了实际测试,分析了系统性能瓶颈,指出了改进方案。
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The Design and Implementation of Information Encrypt Machine Based on Multi-Core SOPC
Abstract:In this paper, it introduces the design and implementation of Information Encrypt Machine Based on Multi-Core SOPC platform and AES Algorithm. Multi-Core SOPC is an innovation of micro-processor and AES is the new standard of encrypt. Based on GX-CIDE, the paper builds a multi-core hardware environment in Altera FPGA which includes three NiosII and uses Mutex and Mailbox as inter-core communication mechanisms. It also introduces the multi-core task assignment of the software part of Information Encrypt Machine and the concrete implemention. At last, it tests the system, analyses the bottleneck, and points the improve.
Keywords: SOPC Multi-Core Information Encrypt AES NiosII
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