Study on particle defects of 28nm high aspect ratio shallow trench isolation gap-filling process

• 1、School of Electronic Information and Electrical Engineering,Shanghai Jiao Tong University,Shanghai 200240
• 2、Shanghai Huali Microelectronics Corporation,Shanghai 201203

Abstract：With the continuous development of integrated circuit technology, the chip integration is higher and higher, millions of active device(NMOS and PMOS) is integrated in an ordinary silicon wafers. In order to avoid the mutual influence between the device, integrated circuit manufacturing need isolation technology to separate device. Due to the narrowing integrated circuit manufacturing process node, isolation technology also have continued research and improvement. After process node into the 90 nm, STI isolation technology get more extensive application with the advantages of effective isolation device, the transistor surface area reduction, the compatible with CMP (chemical mechanical polish). In this paper the high aspect ratio process (HARP) dielectric filling process in application of STI isolation technology were studied. After the brief introduction of the reaction steps of HARP filling process, emphasically analyze the problem of particle defect suffer in HARP filling process, at last study and confirmed the particle defect improvement scheme.

Keywords： shallow trench isolation, high aspect ratio process,particle defect