一种高精度Setup Time测量电路
首发时间:2019-09-20
摘要:设计了一种数模混合的高精度建立时间测量电路,电路包含PLL校准周期产生模块、Delay模块、多重校准模块和SRAM模块共四个模块。在Delay模块中使用了压控延迟设计的方案来调节模块的延时范围使其能够适应不同的测量目标,同时在设计过程中采用模块化的设计方法将各个模拟模块与数字模块结合起来用综合仿真工具进行系统仿真。使用数字电路和模拟电路相结合的设计方式,既克服了模拟电路可移植性差的问题又避免了数字实现精度不足的缺点。使用华力HL55LP工艺进行了流片,on wafer测试结果表明电路可对100ps左右的SRAM建立保持时间做出准确的测量,偏差不超过±10ps。
关键词: SETUP TIME SRAM 测量电路 高精度
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A high-precision Setup/Hold Time measurement circuit
Abstract:A high-precision Setup Time measurement circuit is designed in digital-analog mixed method. The circuit consists of four modules: PLL calibrating period generation module, delay module, multiple calibration module and SRAM module. The VCDL method is used in the delay module to adjust the range of the module so that it can adapt to different ranges of measurement targets. In the process of design, modular design is adopted to combine analog modules with digital modules, and system simulation is carried out with integrated simulation tools. The combination of digital circuit and analog circuit design not only overcomes the problem of poor A high-precision SetuA high-precision Setup/Hold Time measurement circuitp/Hold Time measurement circuitportability of analog circuits, but also avoids the shortcomings of low-precision of digital implementation. Based on the Huali HL55LP process, the on wafer test results show that the SRAM setup/hold time of about 100ps can be accurately measured with a deviation of no more than ±10ps.
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