he paper presents a composite gate turn-off thyristor model, which is based on the combination of the p-n-p and n-p-n transistor models. PSpice simulations and parametric sensitive analysis are performed with the composite model and calculated results are given, which show that it corresponds statically and dynamically with the practical device, and in particular, at turn-off. Furthermore, the model, together with Controlled Thyristor. The simulated results for this model are also presented.