张波
长期从事功率半导体技术、电源管理IC及专用IC的教学、科研和人才培养。
个性化签名
- 姓名:张波
- 目前身份:
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- 学位:
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学术头衔:
博士生导师
- 职称:-
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学科领域:
微电子学
- 研究兴趣:长期从事功率半导体技术、电源管理IC及专用IC的教学、科研和人才培养。
张波,男,教授,博导,学院学位评定分委员会主席、学校学位委员会委员、学校学术委员会委员、学校微电子技术专业组组长,兼任四川省科技厅信息技术专家组成员暨集成电路专业组组长、四川省电子学会半导体集成技术专委会主任、国家集成电路设计成都产业化基地专家组组长、国家集成电路人才培养专家指导委员会委员、中国半导体行业协会理事,同时还兼任多家IC公司技术顾问、多个国际会议分会Co-Chair、多个国家级奖励评选及项目评审组专家(评委)。
长期从事功率半导体技术、电源管理IC及专用IC的教学、科研和人才培养。目前领导着一个有着100余名研究人员(教师及研究生)的“功率集成技术实验室”,承担国家及省部级重点科研项目及与美国、台湾等企业合作项目二十余项。获7项国家及部级科技进步奖、两项中国专利授权。美国Wiley电机工程师大百科全书 “Power Devices”一章作者;在IEEE Trans. On Electron Device、IEEE Trans. On Power Electronics、IEEE Electron Device Letters、IEE Electronics Letters、Solid-State Electronics、Microelectronics Journal、Analog Integrated Circuits and Signal Processing、Chinese Journal of Electronics、 半导体学报、ISPSD、APEC、CIPE、PESC、BCTM、IAS、ICSICT、ICCCAS等重要刊物和国际会议上发表论文100余篇。
1996.05-1999.11以Visiting Professor身份在美国Virginia Tech从事研究工作。
2002年教育部“高校青年教师奖”获得者,2004年“成都市有突出贡献优秀专家”,2005年成都市“十大杰出青年”。
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1433
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成果阅读
195
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成果数
4
【期刊论文】A new partial SOI power device structure with P-type buried layer
张波, Baoxing Duan *, Bo Zhang, Zhaoji Li
Solid-State Electronics 49(2005)1965-1968,-0001,():
-1年11月30日
A new BPSOI (buried layer partial SOI) structure is developed, in which the P-type buried layer is implanted into the P substrate by silicon window underneath the source of the conventional PSOI. The mechanism of breakdown is that the additional electric field produced by P-type buried layer charges modulates surface electric field, which decreases drastically the electric field peaks near the drain and source junctions. Moreover, the on-resistance of BPSOI is decreased as a result of increasing drift region doping due to neutralism of P-type buried layer. The results indicate that the breakdown voltage of BPSOI is increased by 52-58% and the on-resistance is decreased by 45-48% in comparison to conventional PSOI in virtue of 2-D numerical simulations using MEDICI.
BPSOI, Additional electric field modulation, Breakdown voltage, Specific on-resistance
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张波, Wanjun Chen *, Bo Zhang, Zhaoji Li
Microelectronics Journal 37(2006)574-578,-0001,():
-1年11月30日
In this paper, a novel double RESURF LDMOS with multiple rings in non-uniform drift region is proposed and successfully fabricated. The proposed device maximizes the benefits of the double RESURF technique by optimizes key process and device geometrical parameters in order to achieve the lowest on-resistance with the desired breakdown voltage. In addition, a versatile JFET device is firstly developed. The JFET device cannot only be used as the current detector, but also be used as the internal power supply for SPIC. Besides, it is compatible with Bipolar-CMOS technology, without any additional processes required.
RESURF LDMOS, SPIC, Current detector, JFET, Power supply
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【期刊论文】Comparing SiC switching power devices: MOSFET, NPN transistor and GTO thyristor
张波, Alex Q. Huang*, Bo Zhang
Solid-State Electronics 44(2000)325-340,-0001,():
-1年11月30日
This paper for the first time systematically analyzed the operation mechanism of SiC NPN transistors. Theoretical device figure-of-merits for switching power devices based on the conduction loss and switching loss were developed. The on-state loss and the switching loss of 4.5-kV SiC switching power devices (MOSFET, NPN transistor and GTO thyristor) were then compared by using theoretical and numerical calculations. Special emphasis is placed on comparing the total power loss of the devices at a given current density. Theoretical analyses and simulation results show that GTO thyristors have a large switching loss due to the long current tail at turn-oll, hence restricting its maximum operation frequency. High voltage SiC MOSFETs have a large on-state power dissipation at high current levels due to the resistive nature of the drift region, restricting their applications at high current densities. SiC NPN transistors have a comparable switching loss as that of SiC MOSFETs, but at the same time, SiC NPN transistors have the lowest on-state loss. This study indicates that SiC NPN transistor is the most attractive switching power device at 4.5kV.
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【期刊论文】A NEW MOS GATE THYRISTOR--THE SINGLE-GATE EMITTER CONTROLLED THYRISTOR (SECT)
张波, BO ZHANG and ALEX Q. HUANG
Solid-State Electronics Vol. 41, No.9, pp. 1233-1239, 1997,-0001,():
-1年11月30日
This article presents a new MOS gate controlled thyristor-single-gate emitter controlled thyristor (SECT). Its operation is verified by two-dimensional numerical simulations and the operation mechanisms are analyzed. Simulation results obtained on a 2500 V SECT show that the SECT has an excellent high voltage current saturation capability and much wider FBSOA and RBSOA than those of the IGBT and the DC-EST, while at the same time offering lower conduction and switching losses than those of the IGBT.
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