This paper presents a novel architecture of register files that combines the local register files and the global register file for clustered VLIW (Very Long Instruction Word) processors. The communication between function units through global register file will be more efficient. The concept of associate register is introduced for this architecture. This makes it possible to write a result to two destination registers in one operation, which can efficiently speed up the software pipelining.

In this paper, a new systematic method to synthesize the low-complexity and low-power realization of high-order FIR filters in VLSI was proposed. First, FIR filter was reprensented in graph, and the coefficients were reordered to generate a optimal realization structure using minimum spanning tree algorithm. Then the common subexpressions in the multiple constant multiplier array were extracted and reused to get further reduction in computational complexity. Finally, we gave some results of proposed method to demonstrate its effectiveness and high efficiency in synthesis of FIR filter in VLSI.We have achieved 36% reduction in implementation complexity without performance degradation.

For speech processing applications such as speech coding or speech recognition, Gabor transform has been a more and more important tool to rid the speech signal of redundancy. A new ASIC design of Gabor transform for speech processing is presented in this paper. To implement the high-speed operation of Gabor transform, some special architectures are designed. The control part of the system can configure the arithmetic units to adapt to variant operation requirement such as input of different points and processing Gabor transform or inverse-Gabor transform. The design is implemented by using ASIC technology.

In this paper, a novel algorithm called logic depth oriented (LDO) common subexpression elimination (CSE) is proposed. In order to avoid the increase of logic depth in circuit structure that may be caused by the application of some other CSE techniques, the process of common subexpressions eliminating of this algorithm is logic depth oriented and the realization of logic operators reuse will not lead to the increase of logic depth. A complete description of the LDO algorithm and the comparisons with several popular CSE algorithms are presented in this paper. Results of comparisons show that using this algorithm can realize the logic operators reuse efficiently, while the logic depth in circuit structure will maintain optimal. Application of this method in the multiplierless VLSI implementation of high-speed FIR filters or some other multiple constant multiplication (MCM) problems will contribute to the high performances in several aspects such as area, speed and power dissipation.

In this article, the estimation of Harmonic to Noise Ratio (HNR) in transmitted sound signals with wavelet transform was proposed. When subjects phonate sustained vowels in breathy, falsetto, leakage and pressed mode in normal loudness, the HNR in human voice and transmitted sound signals was estimated and compared. The results indicated that the NHR in transmitted sound signals could accurately image vocal folds vibration modes and characteristics. It would be one of useful measurements for clinical laryngeal disease diagnosis.