讨论了半导体pn结内建电场和接触电势的形成与可测性，回答了在半导体物理学pn结内容教学中学生经常会提出的一个似是而非的问题。从热力学第一定律、金属-半导体接触等不同角度详细解释了热平衡（零偏下）时pn结不可能对外输出电压和电流的原因。

This paper reports the annealing process influence on interfacial electrical properties, dopant effects on silicide formation, and dopant redistribution during silicidation in self-aligned NiSi technology. The reverse leakage current results of NiSi/n-Si Schottky diodes show that two-step rapid thermal process (RTP) significantly improves the NiSi/Si area-contact characteristics in comparison with one-step RTP, and low temperature in RTP1 is beneficial to the final Ni-silicide/Si contact properties. Both structural and electrical characterization shows substantially different Ni-silicidation behaviors on heavily-doped n+ and p+ Si substrates at low temperature (300℃). The larger grain size of Ni2Si formed on heavily As-doped Si is responsible for the lower resistivity, comparing with Ni2Si formed on heavily B-doped Si. Ni/Si reaction on highly doped Si substrates also results in significant dopant segregation at the silicide/Si interface and pile up in void-layer formed just underneath the silicide surface.

The Schottky contact of Co, its silicide and germanosilicide on n-poly-Si0.84Ge0.16 layer, was investigated. Amorphous Si0.84Ge0.16 layer was deposited on n-Si (100) substrate by ion beam sputtering (IBS). The layer was doped through thermal diffusion of phosphorus to fabricate n-poly-Si0.84Ge0.16 thin film. The Schottky diodes were formed by deposition of Co on n-poly-Si0.84Ge0.16 by the IBS technique. Solid-phase reaction between Co and n-poly-Si0.84Ge0.16 by rapid thermal annealing (RTA) as a function of temperature was studied. Phase identification and atomic depth profile were characterized by x-ray diffraction and Auger electron spectroscopy, respectively. The current-voltage and capacitance-voltage characteristics of both as-deposited and annealed Co/n-poly-Si0.84Ge0.16 Schottky diodes were investigated. The results reveal that the Schottky barrier height (SBH) keeps nearly constant with the annealing temperature between 300 and 600℃. The constancy of the SBH confirms the fact that Co and its silicides contacting with the same semiconductor have the close Schottky barrier height.

Amorphous Si0.87Ge0.13 is deposited on n-Si (100) substrate by ion beam sputtering (IBS) and doped through thermal diffusion of phosphorus to fabricate n-poly-Si0.87Ge0.13 thin film. The formation of Schottky junction is made by deposition Ni on n-poly-Si0.87Ge0.13 by IBS. Solid-phase reaction mainly occurred above 400℃ by rapid thermal annealing at the interface of Ni/n-poly-Si0.87Ge0.13. Phase identification and depth profile were investigated by X-ray diffraction (XRD) and Auger electron spectroscopy (AES), respectively. The electrical properties of both unannealed and annealed Ni/n-poly-Si0.87Ge0.13 were studied by current-voltage (I-V) measurement. The results demonstrate that the Schottky barrier height (SBH) changes little with the annealing temperature between 300 and 600℃. The constancy of SBH is attributed to the properties of the interface itself which determine the SBH and substantially independent of whether the interfacial material is nickel or nickel germanosilicide.

The temperature-dependent current-voltage (I-V-T) technique has been used to study the Ni/Si solid phase reaction by measuring the Schottky barrier height (SBH) inhomogeneity of Ni-silicide/Si Schottky diodes. The experimental results show the strong dependence of SBH inhomogeneity on the Ni/Si solid phase reaction. The SBH distribution of the diodes annealed at 500 and 600℃ can be described by a single-Gaussian function and the diode annealed at 500℃ is found to have the best homogeneity and the smallest leakage current. The SBH distribution of the diodes annealed at 400, 700, and 800℃ can be described by a double-Gaussian function in which the mean value of the second Gaussian function is substantially smaller than that of the dominant Gaussian function. The variation of SBH inhomogeneity, an interface property, is related to the phase evolution process in the Ni/Si solid phase reaction, and verified by reverse I-V measurements. Our results indicate that the I-V-T technique may be developed as a wafer-level testing tool to monitor the silicidation process in the complementary metal-oxide-semiconductor device fabrication.