本文介绍了一种用于系统芯片测试的测试方案。该测试方案包括测试外壳，测试访问结构和自定义测试控制器。对于一个指定的SoC，该测试方案采用整数线性规划的方法对测试时间作出优化。实验结果表明，对于ITC'02 测试标准电路，该测试方案是一种有效的系统芯片测试方法。

This paper describes a new scalable architecture of Montgomery modular multiplier (MMM) using our improved FIOS algorithm. This algorithm and architecture can manipulate operands of any precision (bit length) in dual field (prime field and binary field) and has the advantage of using relatively smaller latency (clock cycles) to complete one modular multiplication. Our architecture is reusable and has high performance with respect to latency, timing, area, etc.

微系统芯片的测试，非常关键的一个问题就是测试数据量的问题。通常微系统芯片都会包含多个IP内核，而这些内核每一个都需要大量的测试向量来进行测试。这样的测试数据量不仅会超出一般商用自动测试仪器所能提供的存储空间和通道数目，而且也会大大延长测试时间。而测试仪器的成本和测试时间是直接影响测试成本的关键因素之一。因此对测试数据进行压缩成为了一种直接而有效的测试成本优化方案。现有的测试数据压缩算法大多有其他领域的一些压缩算法衍生而来，而由于测试数据本身具有独特的属性，如可指定性、无序性、不均性等，因此需要根据其特性设计具有更好适应性的压缩算法才能获得更加理想的压缩效率和稳定性。本文通过充分研究测试数据的特征，提出了变长、不等间距的自适应压缩算法SAC。数学分析方法和实际电路实验分析都表明SAC算法在压缩效率和稳定性方面具有突出的优势。

This paper presents a novel architecture of register files that combines the local register files and the global register file for clustered VLIW (Very Long Instruction Word) processors. The communication between function units through global register file will be more efficient. The concept of associate register is introduced for this architecture. This makes it possible to write a result to two destination registers in one operation, which can efficiently speed up the software pipelining.

In this article, the estimation of Harmonic to Noise Ratio (HNR) in transmitted sound signals with wavelet transform was proposed. When subjects phonate sustained vowels in breathy, falsetto, leakage and pressed mode in normal loudness, the HNR in human voice and transmitted sound signals was estimated and compared. The results indicated that the NHR in transmitted sound signals could accurately image vocal folds vibration modes and characteristics. It would be one of useful measurements for clinical laryngeal disease diagnosis.