For speech processing applications such as speech coding or speech recognition, Gabor transform has been a more and more important tool to rid the speech signal of redundancy. A new ASIC design of Gabor transform for speech processing is presented in this paper. To implement the high-speed operation of Gabor transform, some special architectures are designed. The control part of the system can configure the arithmetic units to adapt to variant operation requirement such as input of different points and processing Gabor transform or inverse-Gabor transform. The design is implemented by using ASIC technology.

本文介绍了一种用于数字VLSI扫描内建自测试（Built-In Self-Test）的测试点选择算法TEPSAUS（TEst-Point Selection Algorithm Using Small signal model）。在解决控制点选择的计算复杂度问题方面，TEPSAUS 在剔除难于确定观测性增强或减弱的重会聚点后，用小信号模型的方法构造递推算式，这样可测性度量方程（Cost Reduction Function）的计算复杂度降低了。从评测结果看，TEPSAUS 可以从ISCAS89电路和ITC99的b14电路中找到全局的优化测试点，并且CPU的计算时间控制在秒量级。

在集成电路设计中，面积、功耗和可测性是三个最为重要的优化指标。测试成本正随着集成电路规模的不断增大提高，因此在设计中加入可测性设计的考虑已成为共识。基于扫描的可测性设计方法是目前应用最广泛的方法之一。加入扫描结构可以大大提高电路系统的测试性能，但同时也会给系统的面积、性能、功耗等带来一些负面影响。本文提出了一种考虑低功耗因素的可测性设计方法。计算数据显示，与传统扫描设计方法相比，这种方法在改善系统测试功耗方面具有突出的优势。

This paper presents FSimGEO, an efficient test generation method for path delay fault test using Fault Simulation and Genetic Optimization. A parallel-vector fault simulator is introduced first, which can simulate several test vector pairs at the same time through introducing a four-valued logic and the Path Status Graph (PSG) of the circuit structure. After this, a special genetic optimization algorithm is used to direct the process of searching and to optimize test sets generated. We have given the fitness function and genetic operators that affect the optimizing efficiency of Genetic Algorithm (GA) in detail. Experiment results have showed that the number of path tested by FSimGEO is about 3.5 times by latter one.

Rate of Bit Propagation (RBP) is defined to estimate power consumption. And an advanced scan tree technique is presented, which accesses the registers through multi-level scan paths to reduce RBP of scan registers. Result of comparison shows, scan tree reduces the test power observably. 5