Application specific on-chip network is a promising direction for Networks on Chips (NoCs) to solve the interconnection challenges that Systems on Chips (SoCs) will encounter in the billion-transistor age. This paper presents a novel design methodology named On-Chip Network Evolution, which helps developing an on-chip network rapidly according to a specific application. To explore the network design space more efficiently, a new description language-NetC is introduced, which is a group of syntaxes that can be translated into SystemC programs.

差分功耗分析是一种针对密码芯片的攻击手段，它通过分析功耗信息提取芯片密钥。功耗平衡的实现方法可以提供抗功耗攻击的加密硬件。本文介绍了一种由功耗平衡模块组成的延时不敏感（DI）超前进位加法器，这些功耗平衡模块的工作功耗与输入数据无关。本设计的特点是在晶体管级进行功耗平衡。文中给出了功耗平衡模块和普通模块的功耗差分，对比显示电路改进后的模块更安全。

本文主要介绍在本世纪初期微系统芯片在设计方法和测试方法方面所面临的竞争和挑战，可以在哪些方面展开课题的研究。

本文介绍了一种用于系统芯片测试的测试访问结构。该结构可以在测试时间和功耗约束的情况下利用整数线性规划算法自动调整结构参数。实验结构表明这种结构可以非常灵活的生成满足不同约束要求的测试访问结构。

In this paper, a new systematic method to synthesize the low-complexity and low-power realization of high-order FIR filters in VLSI was proposed. First, FIR filter was reprensented in graph, and the coefficients were reordered to generate a optimal realization structure using minimum spanning tree algorithm. Then the common subexpressions in the multiple constant multiplier array were extracted and reused to get further reduction in computational complexity. Finally, we gave some results of proposed method to demonstrate its effectiveness and high efficiency in synthesis of FIR filter in VLSI.We have achieved 36% reduction in implementation complexity without performance degradation.