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陈星弼
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引用
期刊论文
ANALYSIS AND DESIGN GUIDELINES OF JIT'S USED IN PLANAR TECHOLOGY (Invited Paper)
，-0001，（）：
Semiconductor power devices have been steadily developed. Devices with breakdown voltage (BV) of kv's and vueeent handling capabilities of KA's have been achieved today. Junction termination techniques (JTT'S) are used in such devices without exemption. It becomesalso important issues in high-voltage and power integrated circuits (HVIC and PIC) [1].
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