本文研究动力系统的线性群作用，该群的李代数与系统的向量场作用，以及两者间的关系．并将其结果应用于n阶旋转群，给出了n阶旋转对称非线性系统的一般结构表达式。

We propose an approach to optimally synthesize quantum circuits from non-permutative quantum gates such as Controlled-Square-Root–of-Not (i.e. Controlled-V). Our approach reduces the synthesis problem to multiple-valued optimization and uses group theory. We devise a novel technique that transforms the quantum logic synthesis problem from a multi-valued constrained optimization problem to a group permutation problem. The transformation enables us to utilize group theory to exploit the properties of the synthesis problem. Assuming a cost of one for each two-qubit gate, we found all reversible circuits with quantum costs of 4, 5, 6, etc, and give another algorithm to realize these reversible circuits with quantum gates.

In this paper, terminal sliding mode control design is considered. A control method, different from many existing terminal sliding model control design methods, is proposed based on a new switching law and continuous finite-time control ideas. Then terminal sliding mode control laws are constructed for some classes of nonlinear systems.

This paper investigates the synthesis of quantum networks built to realize ternary switching circuits in the absence of ancilla bits. The results we established are twofold. The first shows that ternary Swap, ternary Not and ternary Toffoli gates are universal for the realization of arbitrary n × n ternary quantum switching networks without ancilla bits. The second result proves that all n × n quantum ternary networks can be generated by Not, Controlled-Not, Multiply-Two, and Toffoli gates. Our approach is constructive.

We present a novel component-based approach to hardware/software co-verification of embedded systems using model checking. Embedded systems are pervasive and often mission-critical, therefore, they must be highly trustworthy. Trustworthy embedded systems require extensive verification. The close interactions between hardware and software of embedded systems demand co-verification. Due to their diverse applications and often strict physical constraints, embedded systems are increasingly component-based and include only the necessary components for their missions. In our approach, a component model for embedded systems which unifies the concepts of hardware IPs (i.e., hardware components) and software components is defined. Hardware and software components are verified as they are developed bottom-up. Whole systems are co-verified as they are developed top-down. Interactions of bottom-up and top-down verification are exploited to reduce verification complexity by facilitating compositional reasoning and verification reuse. Case studies on a suite of networked sensors have shown that our approach facilitates major verification reuse and leads to order-of-magnitude reduction on verification complexity.